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1 |
A Multi-Frequency Multi-Standard Wideband Fractional- PLL With Adaptive Phase-Noise Cancellation for Low-Power Short-Range Standards |
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2 |
Characterization of Electrical Steels for High-Speed Induction Motors Applications: Going Beyond the Common Practices |
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3 |
Neurochemostat: A Neural Interface SoC With Integrated Chemometrics for Closed-Loop Regulation of Brain Dopamine |
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4 |
Iterative Gain Enhancement in an Algorithmic ADC |
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5 |
Power-Performance Tradeoff Analysis of CML-Based High-Speed Transmitter Designs Using Circuit-Level Optimization |
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6 |
Electrically Large Resonant Cavity Loaded With -Negative and -Negative Metamaterials |
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7 |
Robust Adaptive Controller Combined With a Linear Quadratic Regulator Based on Kalman Filtering |
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8 |
Hybrid NRZ/Multi-Tone Serial Data Transceiver for Multi-Drop Memory Interfaces |
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9 |
Integrated Wideband Self-Interference Cancellation in the RF Domain for FDD and Full-Duplex Wireless |
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10 |
A 10 mW Bluetooth Low-Energy Transceiver With On-Chip Matching |
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11 |
A 3.5 GHz Digital Fractional-N PLL Frequency Synthesizer Based on Ring Oscillator Frequency-to-Digital Conversion |
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12 |
A 4-Phase 30–70 MHz Switching Frequency Buck Converter Using a Time-Based Compensator |
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13 |
A 7 Gb/s Embedded Clock Transceiver for Energy Proportional Links |
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14 |
A Q-Modulation Technique for Efficient Inductive Power Transmission |
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15 |
Design and Analysis of Low-Power High-Frequency Robust Sub-Harmonic Injection-Locked Clock Multipliers |
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16 |
A Continuous-Time Sturdy-MASH Modulator in 28 nm CMOS |
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17 |
Reconfigurable Receiver With Radio-Frequency Current-Mode Complex Signal Processing Supporting Carrier Aggregation |
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18 |
A 14 b 35 MS/s SAR ADC Achieving 75 dB SNDR and 99 dB SFDR With Loop-Embedded Input Buffer in 40 nm CMOS |
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19 |
An Incremental-Charge-Based Digital Transmitter With Built-in Filtering |
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20 |
A 5 GS/s 150 mW 10 b SHA-Less Pipelined/SAR Hybrid ADC for Direct-Sampling Systems in 28 nm CMOS |
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21 |
A SiGe Terahertz Heterodyne Imaging Transmitter With 3.3 mW Radiated Power and Fully-Integrated Phase-Locked Loop |
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22 |
A Blocker-Tolerant Inductor-Less Wideband Receiver With Phase and Thermal Noise Cancellation |
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23 |
A Low-Cost Unified Design Methodology for Secure Test and Intellectual Property Core Protection |
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24 |
Silicon Slot Waveguides With Low Transmission and Bending Losses at 1064 nm |
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25 |
Novel Active Time-Based Demand Response for Industrial Consumers in Smart Grid |
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26 |
Automatic Fault Detection in WDM-PON With Tunable Photon Counting OTDR |
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27 |
The Effect of Gate and Drain Fields on the Competition Between Donor-Like State Creation and Local Electron Trapping in In–Ga–Zn–O Thin Film Transistors Under Current Stress |
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28 |
A Meander-Line Circular Polarizer Optimized for Oblique Incidence |
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29 |
Probing Projections: Interaction Techniques for Interpreting Arrangements and Errors of Dimensionality Reductions |
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30 |
Understanding personality differences in software organisations using Keirsey temperament sorter |
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31 |
A Wide-Range, Low-Power, All-Digital Delay-Locked Loop With Cyclic Half-Delay-Line Architecture |
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32 |
A 16-Channel Patient-Specific Seizure Onset and Termination Detection SoC With Impedance-Adaptive Transcranial Electrical Stimulator |
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33 |
A Hybrid OTA Driving 15 nF Capacitive Load With 1.46 MHz GBW |
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34 |
A 27 mW Reconfigurable Marker-Less Logarithmic Camera Pose Estimation Engine for Mobile Augmented Reality Processor |
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35 |
A 3.12 pJ/bit, 19–27 Gbps Receiver With 2-Tap DFE Embedded Clock and Data Recovery |
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36 |
A 5.2 mW IEEE 802.15.6 HBC Standard Compatible Transceiver With Power Efficient Delay-Locked-Loop Based BPSK Demodulator |
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37 |
A High-Linearity, 30 GS/s Track-and-Hold Amplifier and Time Interleaved Sample-and-Hold in an InP-on-CMOS Process |
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38 |
A Fully-Integrated Reconfigurable Dual-Band Transceiver for Short Range Wireless Communications in 180 nm CMOS |
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39 |
A 1 mm Pitch Channel 322 Hz Frame-Rate Multitouch Distribution Sensor With Two-Step Dual-Mode Capacitance Scan |
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40 |
A 16.8 Gbps/Channel Single-Ended Transceiver in 65 nm CMOS for SiP-Based DRAM Interface on Si-Carrier Channel |
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41 |
Biometric Liveness Detection: Challenges and Research Opportunities |
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42 |
Digital Mitigation of Transmitter-Induced Receiver Desensitization in Carrier Aggregation FDD Transceivers |
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43 |
Analysis of Weakly Nonlinear Effect for Varactor-Tuned Bandpass Filter |
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44 |
Empirical Geometry-Based Random-Cluster Model for High-Speed-Train Channels in UMTS Networks |
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45 |
Distributed Cooperative Secondary Control for Voltage Unbalance Compensation in an Islanded Microgrid |
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46 |
Single-Phase AC–AC Double-Star Chopper Cells (DSCC) Converter Without Common DC-Link Capacitor |
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47 |
Bayesian Fuzzy Clustering |
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48 |
Ion mobilities in non-polar dielectric liquids: silicone oils |
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49 |
Service provider competition and cooperation in cloud-based software defined wireless networks |
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50 |
A Survey of In-Band Full-Duplex Transmission: From the Perspective of PHY and MAC Layers |
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51 |
Investigation of avionics power switch loading versus aircraft electromagnetic compatibility |
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52 |
Equalization in aeronautical telemetry using multiple transmit antennas |
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53 |
A 25 dBm Outphasing Power Amplifier With Cross-Bridge Combiners |
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54 |
A Fully Integrated Wideband FM Transceiver for Low Data Rate Autonomous Systems |
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55 |
A Wideband Highly Integrated and Widely Tunable Transceiver for In-Band Full-Duplex Communication |
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56 |
Transmit Radiation Pattern Invariance in MIMO Radar With Application to DOA Estimation |
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57 |
A Multi-Mode Control Strategy for VAr Support by Solar PV Inverters in Distribution Networks |
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58 |
Introspections on the Semantic Gap |
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59 |
A Single-Stage Photovoltaic System for a Dual-Inverter-Fed Open-End Winding Induction Motor Drive for Pumping Applications |
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60 |
Grid-Connected Forward Microinverter With Primary-Parallel Secondary-Series Transformer |
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61 |
Minimisation of thermally induced microbending losses in dual-coated optical fibres caused by viscoelastic behaviour of commercial polymeric coatings |
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62 |
Approximate Computing: Making Mobile Systems More Efficient |
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