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  4. A Fully-Integrated Reconfigurable Dual-Band Transceiver for Short Range Wireless Communications in 180 nm CMOS
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Category: Solid-State Circuits Projects
By MTech Projects
MTech Projects
15.May
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A Fully-Integrated Reconfigurable Dual-Band Transceiver for Short Range Wireless Communications in 180 nm CMOS

PROJECT TITLE :

A Fully-Integrated Reconfigurable Dual-Band Transceiver for Short Range Wireless Communications in 180 nm CMOS

ABSTRACT:

A fully-integrated reconfigurable dual-band (760-960 MHz and 2.4-2.5 GHz) transceiver (TRX) for brief vary wireless communications is presented. The TRX consists of 2 individually-optimized RF front-ends for each band and one shared power-scalable analog baseband. The sub-GHz receiver has achieved the utmost seventy five dBc third-order harmonic rejection ratio (HRR3) by inserting a Q-enhanced notch filtering RF amplifier (RFA). In two.four GHz band, one-ended-to-differential RFA with gain/part imbalance compensation is proposed within the receiver. A ΣΔ fractional-N PLL frequency synthesizer with two switchable Category-C VCOs is used to provide the LOs. Moreover, the integrated multi-mode PAs achieve the output P1dB (OP1dB) of 16.3 dBm and fourteen.1 dBm with both 25% PAE for sub-GHz and 2.four GHz bands, respectively. A power-management loop is proposed to detect the input signal PAPR in real-time and flexibly reconfigure the PA's operation modes to boost the back-off potency. With this proposed technique, the PAE of the sub-GHz PA is improved by ×3.twenty four and ×1.forty one at 9 dB and 3 dB back-off powers, respectively, and also the PAE of the two.four GHz PA is improved by ×a pair of.seventeen at half dozen dB back-off power. The presented transceiver has achieved comparable or maybe better performance in terms of noise figure, HRR, OP1dB and power potency compared with the state-of-the-art.

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