VLSI Core IEEE Projects For MTech ECE Students 2022

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A 32-bit 4×4 Bit-Slice RSFQ Matrix Multiplier - 2018
A Cost-Effective Self-Healing Approach for Reliable Hardware Systems - 2018
A Low-Power Configurable Adder for Approximate Applications - 2018
A Low-Power High-Speed Accuracy-Controllable Approximate Multiplier Design - 2018
A Low-Power Yet High-Speed Configurable Adder for Approximate Computing - 2018
A Simple Yet Efficient Accuracy- Configurable Adder Design - 2018
Adaptive Approximation in Arithmetic Circuits: A Low-Power Unsigned Divider Design - 2018
Approximate Hybrid High Radix Encoding for Energy-Efficient Inexact Multipliers - 2018
Approximate Quaternary Addition with the Fast Carry Chains of FPGAs - 2018
Approximate Sum-of-Products Designs Based on Distributed Arithmetic - 2018
Architecture Generator for Type-3 Unum Posit Adder/Subtractor - 2018
Design and Evaluation of Approximate Logarithmic Multipliers for Low Power Error-Tolerant Applications - 2018
Design, Evaluation and Application of Approximate High-Radix Dividers - 2018
Efficient Design for Fixed-Width Adder-Tree - 2018
Efficient Fixed/Floating-Point Merged Mixed-Precision Multiply-Accumulate Unit for Deep Learning Processors - 2018
Enhancing Fundamental Energy Limits of Field-Coupled Nano computing Circuits - 2018
Exploration of Approximate Multipliers Design Space using Carry Propagation Free Compressors - 2018
Inexact Arithmetic Circuits for Energy Efficient loT Sensors Data Processing - 2018
Low-Power Addition with Borrow-Save Adders under Threshold Voltage Variability - 2018
Novel High speed Vedic Multiplier proposal incorporating Adder based on Quaternary Signed Digit number system - 2018

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+91 9573777164
9:00am - 6:00pm IST
info@mtechprojects.com

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A 32-bit 4×4 Bit-Slice RSFQ Matrix Multiplier - 2018

A Cost-Effective Self-Healing Approach for Reliable Hardware Systems - 2018

A Low-Power Configurable Adder for Approximate Applications - 2018

A Low-Power High-Speed Accuracy-Controllable Approximate Multiplier Design - 2018

A Low-Power Yet High-Speed Configurable Adder for Approximate Computing - 2018

A Simple Yet Efficient Accuracy- Configurable Adder Design - 2018

Adaptive Approximation in Arithmetic Circuits: A Low-Power Unsigned Divider Design - 2018

Approximate Hybrid High Radix Encoding for Energy-Efficient Inexact Multipliers - 2018

Approximate Quaternary Addition with the Fast Carry Chains of FPGAs - 2018

Approximate Sum-of-Products Designs Based on Distributed Arithmetic - 2018

Architecture Generator for Type-3 Unum Posit Adder/Subtractor - 2018

Design and Evaluation of Approximate Logarithmic Multipliers for Low Power Error-Tolerant Applications - 2018

Design, Evaluation and Application of Approximate High-Radix Dividers - 2018

Efficient Design for Fixed-Width Adder-Tree - 2018

Efficient Fixed/Floating-Point Merged Mixed-Precision Multiply-Accumulate Unit for Deep Learning Processors - 2018

Enhancing Fundamental Energy Limits of Field-Coupled Nano computing Circuits - 2018

Exploration of Approximate Multipliers Design Space using Carry Propagation Free Compressors - 2018

Inexact Arithmetic Circuits for Energy Efficient loT Sensors Data Processing - 2018

Low-Power Addition with Borrow-Save Adders under Threshold Voltage Variability - 2018

Novel High speed Vedic Multiplier proposal incorporating Adder based on Quaternary Signed Digit number system - 2018

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