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  4. Power Efficient Approximate Booth Multiplier - 2018
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Category: MTech VLSI Projects
By MTech Projects
MTech Projects
11.Oct
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Power Efficient Approximate Booth Multiplier - 2018

PROJECT TITLE :

Power Efficient Approximate Booth Multiplier - 2018

ABSTRACT:

Power consumption is a vital constraint in multimedia and deep learning applications. Approximate computing offers efficient approach to reduce power consumption. In this paper, novel approximation is proposed for radix-4 booth multiplication. Approximation is introduced in partial product generation and partial product accumulation circuits. Radix-4 partial product generation and accumulation approximation is proposed which remarkably enhances the performance. The proposed approximate booth multiplier achieves forty onep.c space reduction and 49percent power reduction compared to an actual booth multiplier. Conjointly, it's better space, power and error metrics compared to existing works on approximate multipliers. The proposed multiplier is evaluated with an image processing application-in Discrete Cosine Rework (DCT) encoding part of JPEG compression and found to perform nearly just like precise multiplication unit.

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Previous article: Reducing the Hardware Complexity of a Parallel Prefix Adder - 2018 Reducing the Hardware Complexity of a Parallel Prefix Adder - 2018 Next article: Optimizing Power-Accuracy trade-off in Approximate Adders - 2018 Optimizing Power-Accuracy trade-off in Approximate Adders - 2018
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