PROJECT TITLE:

PAQCS Physical Design-Aware Fault-Tolerant Quantum Circuit Synthesis - 2015

ABSTRACT:

Quantum circuits carries with it a cascade of quantum gates. In a very physical style-unaware quantum logic circuit, a gate is assumed to work on an arbitrary set of quantum bits (qubits), without considering the physical location of the qubits. However, essentially, physical qubits should be placed on a grid. Every node of the grid represents a qubit. The grid implements the design of the quantum pc. A physical constraint usually imposed is that quantum gates can solely operate on adjacent qubits on the grid. Hence, a communication channel needs to be engineered if the qubits within the logical circuit aren't adjacent. In this project, we tend to introduce a tool known as the physical style-aware fault-tolerant quantum circuit synthesis (PAQCS). It contains two algorithms: one for physical qubit placement and another for routing of communications. With the help of these two algorithms, the overhead of converting a logical to a physical circuit is reduced by thirty.onep.c, on an average, relative to previous work. The optimization algorithms in PAQCS are evaluated on circuits implemented using quantum operations supported by two different quantum physical machine descriptions and three quantum error-correcting codes. They cut back the amount of primitive operations by 11.fivepercent-68.6p.c, and the amount of execution cycles by 16.nine%-59.fourpercent.