PROJECT TITLE :

Low-Power FPGA Design Using Memorization-Based Approximate Computing - 2016

ABSTRACT:

Field-programmable gate arrays (FPGAs) are increasingly used as the computing platform for fast and energy-efficient execution of recognition, mining, and search applications. Approximate computing is one promising method for achieving energy efficiency. Compared with most prior works on approximate computing, which target approximate processors and arithmetic blocks, this paper presents an approximate computing methodology for FPGA-based design. It studies memoization as a methodology for approximation on FPGA and analyzes completely different architectural and design parameters that should be thought-about. The proposed design flow leverages on high-level synthesis to enable memoization-primarily based microarchitecture generation, thus also facilitating a C-to-register-transfer-level synthesis. When compared with the previous approaches of bit-width truncation and approximate multipliers, memoization-based mostly approximate computation on FPGA achieves a significant dynamic power saving (around twenty%) with very tiny space overhead (<;5%) and higher power-to-signal noise ratio values for the studied image-processing benchmarks.