PROJECT TITLE:

Low Complexity Low Latency Architecture for Matching of Data Encoded With Hard Systematic Error Correcting Codes - 2014

ABSTRACT:

A brand new design for matching the information protected with a blunder-correcting code (ECC) is presented during this brief to scale back latency and complexity. Primarily based on the very fact that the codeword of an ECC is usually represented in a systematic type consisting of the raw knowledge and the parity data generated by encoding, the proposed architecture parallelizes the comparison of the data and that of the parity information. To further scale back the latency and complexity, additionally, a brand new butterfly-formed weight accumulator (BWA) is proposed for the efficient computation of the Hamming distance. Grounded on the BWA, the proposed design examines whether the incoming information matches the stored data if a certain number of erroneous bits are corrected. For a (40, 33) code, the proposed design reduces the latency and the hardware complexity by ~32% and 9percent, respectively, compared with the foremost recent implementation.