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  4. Design and Analysis of Multiplier Using Approximate 15-4 Compressor - 2017
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Category: MTech VLSI Projects
By MTech Projects
MTech Projects
11.Oct
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Design and Analysis of Multiplier Using Approximate 15-4 Compressor - 2017

PROJECT TITLE :

Design and Analysis of Multiplier Using Approximate 15-4 Compressor - 2017

ABSTRACT:

This paper presents the design of approximate 15-four compressor using 5-three compressors as basic module. Four different types of approximate five-three compressors are utilized in a 15-four compressor for less power consumption and high pass rate. We tend to have analysed the ends up in all the cases. A sixteen × 16 bit multiplier is simulated using the proposed fifteen-4 compressor. Simulation results show that the multipliers with proposed approximate compressors achieve vital improvement in power as compared to the multipliers with correct fifteen-4 compressor. Pass rate of the proposed multipliers are high as compared to other existing approximate multipliers. Finally, the proposed multiplier is employed in image processing applications, where the peak signal to noise ratio of the image is measured. Quality of the image is compared with an correct multiplier and therefore the obtained results show that our proposed multiplier performs better than existing approximate multiplier.

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Previous article: Energy-Efficient Approximate Multiplier Design usingBit Significance-Driven Logic Compression - 2017 Energy-Efficient Approximate Multiplier Design usingBit Significance-Driven Logic Compression - 2017 Next article: Sign-Magnitude Encoding for Efficient VLSI Realization of Decimal Multiplication - 2017 Sign-Magnitude Encoding for Efficient VLSI Realization of Decimal Multiplication - 2017
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