PROJECT TITLE :

Design and Implementation of a Novel Multilevel DC-AC Inverter - 2016

ABSTRACT:

In this paper, a novel multilevel dc-ac inverter is proposed. The proposed multilevel inverter generates seven-level ac output voltage with the acceptable gate signals' design. Additionally, the low-pass filter is used to scale back the total harmonic distortion of the sinusoidal output voltage. The switching losses and also the voltage stress of power devices can be reduced within the proposed multilevel inverter. The operating principles of the proposed inverter and the voltage balancing methodology of input capacitors are discussed. Finally, a laboratory prototype multilevel inverter with four hundred-V input voltage and output 220 Vrms/two is implemented. The multilevel inverter is controlled with sinusoidal pulse-width modulation (SPWM) by TMS320LF2407 digital signal processor (DSP). Experimental results show that the most potency is 96.nine% and the total load efficiency is ninety four.six%.