PROJECT TITLE :

High-speed energy-efficient bi-directional transceiver for on-chip global interconnects

ABSTRACT:

During this paper, a new bi-directional transceiver has been proposed for prime-speed signalling across on-chip world interconnects. The proposed transceiver has 2 modes of operation specifically, the transmitter and therefore the receiver. Thus, 2 transceivers sitting at the 2 ends of an interconnect will support 2-approach communication through the same link. The transceiver has terribly low little-signal impedance for each modes of operation and thereby supports high bandwidth of the link. Moreover, as a result of of its high transimpedance gain over a massive bandwidth within the receiving mode, the signalling current will be reduced to a very low worth. The circuit has been designed in sixty five nm, 1.2 V process with a international interconnect of length 10 mm and width one.5 μm. Post-layout simulation of the transceivers with the link provides an energy efficiency of 0.101 pJ/b for a knowledge transmission of 14 Gbps.