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Sequential Lateral Solidification of Silicon Thin Films on Cu BEOL-Integrated Wafers for Monolithic 3-D Integration
PROJECT TITLE :
Sequential Lateral Solidification of Silicon Thin Films on Cu BEOL-Integrated Wafers for Monolithic 3-D Integration
ABSTRACT:
We tend to demonstrate that wafers integrated with copper (Cu) Damascene interconnects are appropriate substrates for the excimer laser crystallization of silicon thin films. This approach permits for the monolithic three-D integration of transistors on the back end of line (BEOL) of silicon wafers for VLSI monolithic 3-D integration. This is supported by a 1-D finite-part technique simulation of the integrated structure, which shows that, upon excimer laser irradiation, the temperature of the buried Cu layer stays below 320 °C, which could be a favorable condition for monolithic 3-D integration. The crystallization of a a hundred-nm amorphous silicon layer on a one-μm SiO2 dielectric is demonstrated on a BEOL-integrated wafer. The Raman spectrum of the silicon layer when laser irradiation shows a polycrystalline peak centered around 513 cm-1. Optical microscopy shows polycrystalline silicon with no physical injury of the Cu lines. The electrical characterization of the Cu buried layer, with and while not undergoing the irradiation process, shows no variation or degradation in Cu conductivity.
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